1. Field of the Invention
The present invention relates to a bump electrode structure of a semiconductor device and a method for forming the same.
2. Description of the Related Art
Conventionally known is a bonding system in which bump electrodes are formed in a semiconductor device, and are bonded directly to metal leaf leads which are attached to a carrier tape. This system is the so-called TAB (tape automated bonding) system which has been known fairly long. With the rapid progress of the photolithography, along with the demand for the miniaturization of electronic apparatuses, the TAB system has recently started to be revaluated favorably. After all, the most essential technical factor of this system lies in that the bump electrodes are formed in the semiconductor device.
FIG. 8 is a sectional view of a prior art bump electrode structure. In FIG. 8, numeral 1 denotes a silicon wafer, on which is formed electrode pad 2 composed of aluminum or aluminum alloy. Pad 2 is connected with internal electrodes of wafer 1, such as gates (not shown). The peripheral edge portion of electrode pad 2 is covered by insulating layer 3 of silicon nitride or the like, through which opening 3a is bored facing the pad. Formed on electrode pad 2 is under-bump layer 4 which is composed of barrier metal layer 4a and bonding metal layer 4b. Layer 4 is formed by vacuum evaporation or sputtering. In FIG. 8, layer 4 is shown as being located only on electrode pad 2 and that portion of insulating layer 3 surrounding the pad. In an actual process, however, under-bump layer 4 is etched as illustrated after layer 4 is formed over the whole surface of insulating layer 3 and bump electrode is formed. In this case, layer 4 is adhered to both electrode pad 2 and the portion of insulating layer 3 laminated to the pad 2. Satisfactory bonding strength can be ensured if the area for the adhesion is wide. Gold bump electrode 5 is formed on under-bump layer 4 by plating. As a foundation layer for the plating, thin gold layer 5a is formed on bonding metal layer 4b. Using bump electrode 5 as a mask, thereafter, that portion of under-bump layer 4 outside electrode 5 is removed by etching, as mentioned before. Usually, isotropic wet etching is used for this purpose.
According to the prior art arrangement described above, however, bump electrode 5 is shaped like a top-heavy mushroom, so that electrode pad pitches are inevitably wide. It is difficult, therefore, to apply this arrangement to recent semiconductor devices whose electrode pads 2 have very narrow widths (or diameters) and pitches. As the widths or diameters of the electrode pads become finer, there is an increasing demand for the development of a technique to form fine bump electrodes. The most important problem of this development is how to secure the bonding strength between the electrode pads and the under-bump layers, between the under-bump layers and the bump electrodes, and further between the bump electrodes and external lead terminals bonded thereto, when the top width (or diameter) of the bump electrodes is reduced.